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    首頁產(chǎn)品索引NB3L8543S

    NB3L8543S

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    1 MUX to 4 LVDS Clock Fanout Buffer Outputs with Clock Enable and Clock Select

    制造商：ON

    中文數(shù)據(jù)手冊

    產(chǎn)品信息

    The NB3L8543S is a high performance, low skew 1?to?4 LVDSClock Fanout Buffer.The NB3L8543S features a multiplexed input which can be drivenby either a differential or single?ended input to allow for thedistribution of a lower speed clock along with the high speed systemclock.The CLK_SEL pin will select the differential CLK and CLKb inputswhen LOW (or left open and pulled LOW by the internal pull?downresistor). When CLK_SEL is HIGH, the differential PCLK and PCLKbinputs are selected.The common clock enable pin, CLK_EN, is synchronous so that theoutputs will only be enabled/disabled when they are already in theLOW state. This avoids any chance of generating a runt clock pulse onthe outputs during asynchronous assertion/deassertion of the clockenable pin. The internal flip flop is clocked on the falling edge of theinput clock; therefore, all associated specification limits arereferenced to the negative edge of the clock input.
    • Four Differential LVDS Output Pairs
    • Two Selectable Differential Clock Inputs
    • CLK/CLKb Can Accept LVPECL, LVDS, HCSL, HSTL and SSTL
    • PCLK/PCLK Can Accept LVPECL, LVDS, CML and SSTL
    • Maximum Output Frequency: 650 MHz
    • Additive Phase Jitter, RMS: 50 fs (typical)
    • Output Skew: 40 ps (maximum)
    • Part?to?part Skew: 200 ps (maximum)
    • Propagation Delay: 1.9 ns (maximum)

    在線購買

    型號制造商描述購買
    NB3L8543SDTGONICCLKBUFF2:1:4LVPECL20TSSOP 立即購買
    NB3L8543SDTR2GONICCLKBUFF2:1:4LVPECL20TSSOP 立即購買

    技術(shù)資料

    標(biāo)題類型大?。↘B）下載
    AC Characteristics of ECL DevicesPDF896 點(diǎn)擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載
    Thermal Analysis and Reliability of WIRE BONDED ECLPDF119 點(diǎn)擊下載
    Clock Generation and Clock and Data Marking and Ordering Information GuidePDF71 點(diǎn)擊下載
    TSSOP-20 WBPDF38 點(diǎn)擊下載
    2.5V/3.3V Differential 2:1 MUX to 4 LVDS Fanout Buffer OutputsPDF228 點(diǎn)擊下載

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