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    首頁產(chǎn)品索引NB3L204K

    NB3L204K

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    4 HCSL Fanout Buffer

    制造商：ON

    中文數(shù)據(jù)手冊(cè)

    產(chǎn)品信息

    The NB3L204K is a differential 1:4 Clock fanout buffer withHigh?speed Current Steering Logic (HCSL) outputs. Inputs candirectly accept differential LVPECL, LVDS, and HCSL signals.Single?ended LVPECL, HCSL, LVCMOS, or LVTTL levels areaccepted with a proper external Vth reference supply per Figures 4and 6. The input signal will be translated to HCSL and provides fouridentical copies operating up to 350 MHz.The NB3L204K is optimized for ultra?low phase noise, propagationdelay variation and low output–to–output skew, and is DB400Hcompliant. As such, system designers can take advantage of theNB3L204K’s performance to distribute low skew clocks across thebackplane or the motherboard making it ideal for Clock and Datadistribution applications such as PCI Express, FBDIMM, Networking,Mobile Computing, Gigabit Ethernet, etc.Output drive current is set by connecting a 475resistor fromIREF (Pin 14) to GND per Figure 11. Outputs can also interface toLVDS receivers when terminated per Figure 12.
    • Maximum Input Clock Frequency > 350 MHz
    • 2.5 V ±5% / 3.3 V ±10% Supply Voltage Operation
    • 4 HCSL Outputs
    • DB400H Compliant
    • Individual OE Control Pin for Each Bank of Outputs
    • 100 ps Max Output?to?Output Skew Performance
    • 1 ns Typical Propagation Delay
    • 450 ps Typical Rise and Fall Times
    • 80 fs Maximum Additive Phase Jitter RMS

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    型號(hào)制造商描述購買
    NB3L204KMNGONNB3L204K 是一款差分 1:4 時(shí)鐘扇出緩沖器，帶高速電流轉(zhuǎn)向 (HCSL) 輸出。輸入可直接接受差分 LVPECL、LVDS 和 HCSL 信號(hào)。使用恰當(dāng)?shù)耐獠?Vth 參考電源，接受單端 LVPECL、HCSL、LVCMOS 或 LVTTL 電平，參見圖 4 和 6。 輸入信號(hào)將轉(zhuǎn)換為 HCSL，能夠運(yùn)行頻率最高 350 MHz 的四個(gè)相同版本。NB3L204K 針對(duì)超低相位干擾、傳播延遲變化和低輸出-輸出歪曲率進(jìn)行了優(yōu)化，符合 DB400H 標(biāo)準(zhǔn)。因此，系統(tǒng)設(shè)計(jì)人員可以利用 NB3L204K 的性能在背面電極或母板中分發(fā)低歪曲率時(shí)鐘，因此適用于 PCI Express、FBDIMM、聯(lián)網(wǎng)、移動(dòng)計(jì)算、千兆位以太網(wǎng)等時(shí)鐘和數(shù)據(jù)分發(fā)應(yīng)用。輸出驅(qū)動(dòng)電流通過從 IREF（引腳 14）到 GND 聯(lián)接一個(gè) 475 電阻來設(shè)置，如圖 11 所示。輸出端接時(shí)還可接口到 LVDS 接收器，如圖 12 所示。 立即購買
    NB3L204KMNTXG-- 立即購買

    技術(shù)資料

    標(biāo)題類型大?。↘B）下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載
    Clock Generation and Clock and Data Marking and Ordering Information GuidePDF71 點(diǎn)擊下載
    Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN)PDF40 點(diǎn)擊下載
    QFN24 4x4, 0.5PPDF58 點(diǎn)擊下載
    2.5V, 3.3V Differential 1:4 HCSL Fanout BufferPDF400 點(diǎn)擊下載
    NB3L204K.IBSUNKNOW54 點(diǎn)擊下載

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