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    首頁產(chǎn)品索引NB3H5150-01

    NB3H5150-01

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    ?Clock Generator, Multi-Rate, Low Noise 2.5V / 3.3V

    制造商:ON

    中文數(shù)據(jù)手冊(cè)

    產(chǎn)品信息

    The NB3H5150-01 is a high performance Multi?Rate Clock generatorwhich simultaneously synthesizes up to four different frequenciesfrom a single PLL using a 25 MHz input reference. The referencefrequency can be provided by a crystal, LVCMOS/LVTTL, LVPECL,HCSL or LVDS differential signals. The REFMODE pin will selectthe reference source.Three output banks (CLK1A/CLK1B to CLK3A/CLK3B) produceuser selectable frequencies of: 25 MHz, 50 MHz,100 MHz, 125 MHz, or 156.25 MHz and have ultra?low noise/jitterperformance of less than 0.3 ps.The fourth output bank (CLK4A/CLK4B) can produce thefollowing integer and FRAC?N frequencies in pin?strap mode:25 MHz, 33.33 MHz, 50 MHz, 66.66 MHz, 100 MHz, 125 MHz,133.33 MHz, 156.25 MHz or 161.1328 MHz.More programmable frequencies are available via the I2C interfacewith jitter performance of less than 1 ps. Detailed registereddescriptions will be available in a future application note.Each output block can create two single?ended in?phase LVCMOSoutputs or one differential pair of LVPECL outputs.Each of the four output blocks is independently powered by aseparate VDDO, 2.5 V/3.3 V for LVPECL, 1.8 V/2.5 V/3.3 V forLVCMOS.The serial (I2C and SMBUS) interface can program a variety offunctions including the frequencies and output levels of each dividerblock which can be individually enabled and disabled.

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      型號(hào)制造商描述購(gòu)買
      NB3H5150-01MNTXGONNB3H5150-01 是一款高性能多速率時(shí)鐘生長(zhǎng)期,可使用 25 MHz 輸入?yún)⒖?,基于單個(gè) PLL 同時(shí)合成最多四個(gè)不同的頻率。參考頻率可由晶體、LVCMOS/LVTTL、LVPECL、HCSL 或 LVDS 差分信號(hào)。REFMODE 引腳選擇參考源。三個(gè)輸出組(CLK1A/CLK1B 至 CLK3A/CLK3B)產(chǎn)生用戶可選擇的頻率: 25 MHz、50 MHz、100 MHz、125 MHz 或 156.25 MHz,并且具有小于 0.3 ps 的超低噪聲/抖動(dòng)性能。第四個(gè)輸出組 (CLK4A/CLK4B) 可在引腳搭接模式下產(chǎn)生以下整數(shù)和 FRAC?N 頻率: 25 MHz、33.33 MHz、50 MHz、66.66 MHz、100 MHz、125 MHz、133.33 MHz、156.25 MHz 或 161.1328 MHz。通過 I2C 接口可提供更多可編程頻率,且具有不到 1 ps 的抖動(dòng)性能。在將來的應(yīng)用說明中會(huì)提供詳細(xì)的注冊(cè)說明。每個(gè)輸出塊可創(chuàng)建兩個(gè)單端相內(nèi) LVCMOS 輸出或一個(gè) LVPECL 輸出差分對(duì)。在四個(gè)輸出塊中,每個(gè)均可通過單獨(dú)的 VDDO、用于 LVPECL 的 2.5 V/3.3 V、用于 LVCMOS 的 1.8 V/2.5 V/3.3 V 單獨(dú)供電。串行(I2C 和 SMBUS)接口可編程多種功能,包括每個(gè)分頻器塊的頻率和輸出電平,并且每個(gè)塊均可單獨(dú)啟用和禁用。 立即購(gòu)買

      技術(shù)資料

      標(biāo)題類型大小(KB)下載
      Termination of ECL Logic DevicesPDF176 點(diǎn)擊下載
      QFN32 5x5, 0.5PPDF56 點(diǎn)擊下載
      NB3H5150 IBIS ModelUNKNOW166 點(diǎn)擊下載
      2.5V / 3.3V Low Noise Multi-Rate Clock GeneratorPDF179 點(diǎn)擊下載
      可編程的多速率時(shí)鐘產(chǎn)生器,具備低噪聲,適用于電信和網(wǎng)絡(luò)應(yīng)用UNKNOW135 點(diǎn)擊下載
      NB3H5150 Crystal Oscillator Selector Guide and PCB Layout GuidelinesPDF449 點(diǎn)擊下載

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