MC74AC273

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?Octal DFlip-Flop

制造商：ON

中文數(shù)據(jù)手冊(cè)

產(chǎn)品信息

The MC74AC273/74ACT273 has eight edge-triggered D-type flip-flops withindividual D inputs and Q outputs. The common buffered Clock (CP) and MasterReset (MR) inputs load and reset (clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D input, one setup timebefore the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output.
All outputs will be forced LOW independently of Clock or Data inputs by a LOWvoltage level on the MR input. The device is useful for applications where the trueoutput only is required and the Clock and Master Reset are common to all storageelements.

Ideal Buffer for MOS Microprocessor or Memory
Eight Edge-Triggered D Flip-Flops
Buffered Common Clock
Buffered, Asynchronous Master Reset
See MC74AC377 for Clock Enable Version
See MC74AC373 for Transparent Latch Version
See MC74AC374 for 3-State Version
Outputs Source/Sink 24 mA
ACT273 Has TTL Compatible Inputs
Pb-Free Packages are Available

在線購買

型號(hào)	制造商	描述	購買
MC74AC273DWR2G	ON		立即購買
MC74AC273DWG	ON		立即購買
MC74AC273DTR2G	ON	IC FF D-TYPE SNGL 8BIT 20TSSOP	立即購買

技術(shù)資料

標(biāo)題	類型	大?。↘B）	下載
Octal D Flip Flop	PDF	91	點(diǎn)擊下載
IBIS Model for MC74AC273N_5	UNKNOW	6	點(diǎn)擊下載
IBIS Model for MC74AC273DW_5	UNKNOW	6	點(diǎn)擊下載
IBIS Model for MC74AC273N_33	UNKNOW	9	點(diǎn)擊下載
IBIS Model for MC74AC273DW_33	UNKNOW	9	點(diǎn)擊下載
TSSOP-20 WB	PDF	38	點(diǎn)擊下載
SOIC-20 WB	PDF	35	點(diǎn)擊下載

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