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    首頁產(chǎn)品索引MC100E016

    MC100E016

    購買收藏
    ?ECL 8-Bit Up Synchronous Binary Counter

    制造商：ON

    中文數(shù)據(jù)手冊

    產(chǎn)品信息

    The MC10E/100E016 is a high-speed synchronous, presettable, cascadable 8-bit binary counter. Architecture and operation are the same as the MC10H016 in the MECL 10H family, extended to 8-bits, as shown in the logic symbol.
    The counter features internal feedback of TCbar, gated by the TCLD (terminal count load) pin. When TCLD is LOW (or left open, in which case it is pulled LOW by the internal pull-downs), the TCbar feedback is disabled, and counting proceeds continuously, with TCbar going LOW to indicate an all-one state. When TCLD is HIGH, the TC feedback causes the counter to automatically reload upon TCbar = LOW, thus functioning as a programmable counter. The Q
    outputs do not need to be terminated for the count function to operate properly. To minimize noise and power, unused Q outputs should be left unterminated.
    The 100 series contains temperature compensation.
    • 700MHz Min. Count Frequency
    • 1000ps CLK to Q, TCbar
    • Internal TCbar Feedback (Gated)
    • 8-Bit
    • Fully Synchronous Counting and TCbar Generation
    • Asynchronous Master Reset
    • PECL Mode Operating Range: V
    • = 4.2 V to 5.7 V with V
    • = 0 V
    • NECL Mode Operating Range: V
    • = 0 V with V
    • = -4.2 V to -5.7 V
    • Internal Input Pulldown Resistors
    • ESD Protection: > 2 kV HBM, > 200 V MM
    • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
    • Moisture Sensitivity Level 1
    • For Additional Information, see Application Note AND8003/D
    • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
    • Transistor Count = 592 devices
    • Pb-Free Packages are Available

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    型號制造商描述購買
    MC100E016FNGON 立即購買
    MC100E016FNR2GONMC10E/100E016 是一款高速同步、可預(yù)設(shè)置、可級聯(lián) 8 位二進(jìn)制計(jì)數(shù)器。結(jié)構(gòu)和運(yùn)行與 MECL 10H 系列中的 MC10H016 相同，可擴(kuò)展到 8 位，如邏輯符號所示。該計(jì)數(shù)器具有指向由 TCLD（終端計(jì)數(shù)負(fù)載）引腳進(jìn)行門控的 TCbar 的內(nèi)部反饋。當(dāng) TCLD 為低電平（或保持開路狀態(tài)，此時通過內(nèi)部下拉拉至低電平）時，TCbar 反饋禁用，計(jì)數(shù)繼續(xù)進(jìn)行，TCbar 變?yōu)榈碗娖剑砻鹘y(tǒng)一狀態(tài)。當(dāng) TCLD 為高電平時，TC 會導(dǎo)致計(jì)數(shù)器在 TCbar =低電平時自動重新加載，因此就好像一個可編程計(jì)數(shù)器一樣。Qn 輸出不需要端接即可使得計(jì)數(shù)功能正常運(yùn)行。為了最大程度減少噪聲和功耗，未使用的 Q 輸出應(yīng)保持無端接。100 系列包含了溫度補(bǔ)償。 立即購買

    技術(shù)資料

    標(biāo)題類型大?。↘B）下載
    AC Characteristics of ECL DevicesPDF896 點(diǎn)擊下載
    ECL Clock Distribution TechniquesPDF54 點(diǎn)擊下載
    Interfacing Between LVDS and ECLPDF121 點(diǎn)擊下載
    Designing with PECL (ECL at +5.0 V)PDF102 點(diǎn)擊下載
    The ECL Translator GuidePDF142 點(diǎn)擊下載
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 點(diǎn)擊下載
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 點(diǎn)擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載

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