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    首頁產(chǎn)品索引CDCE937-Q1

    CDCE937-Q1

    購買收藏
    具有 2.5V 或 3.3V LVCMOS 輸出的汽車類可編程 3-PLL VCXO 時鐘合成器

    制造商:TI

    產(chǎn)品信息

    描述 The CDCE937-Q1 and CDCEL937-Q1 devices are modular, phase-locked loop (PLL) based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCEx937-Q1 for their own specifications. The CDCEx937-Q1 generates up to seven output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS as these platforms are evolving into smaller and more cost effective systems. Furthermore, each output can be programmed in-system for any clock frequency up to 230 MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25. Customization of frequency programming and SSC are accessed using three user-defined control pins. This eliminates the additional interface requirement to control the clock. Specific power-up and power-down sequences can also be defined to the userΩs needs.特性Qualified for Automotive Applications AEC-Q100 Qualified With the Following Results: Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature RangeDevice HBM ESD Classification Level 2 Device CDM ESD Classification Level C4B In-System Programmability and EEPROM Serial Programmable Volatile RegisterNonvolatile EEPROM to Store Customer Setting Flexible Input Clocking Concept External Crystal: 8 MHz to 32 MHzOn-Chip VCXO: Pull Range ±150 ppmSingle-Ended LVCMOS up to 160 MHz Free Selectable Output Frequency up to 230??MHz Low-Noise PLL Core Integrated PLL Loop Filter ComponentsLow Period Jitter (Typical 60 ps) Separate Output Supply Pins CDCE937-Q1: 3.3 V and 2.5 V CDCEL937-Q1: 1.8 V Flexible Clock Driver Three User-Definable Control Inputs [S0/S1/S2]; for Example: SSC Selection, Frequency Switching, Output Enable or Power DownGenerates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth?, WLAN, Ethernet?, and GPSGenerates Common Clock Frequencies Used With TI-DaVinci?, OMAP?, DSPsProgrammable SSC ModulationEnables 0-PPM Clock Generation 1.8-V Device Power Supply Wide Temperature Range –40°C to 125°C Packaged in TSSOP Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock?)APPLICATIONSClusters Head Units Navigation Systems Advanced Driver Assistance Systems (ADAS)All other trademarks are the property of their respective owners.

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    型號制造商描述購買
    CDCE937QPWRQ1TICDCE937-Q1 具有 2.5V 或 3.3V LVCMOS 輸出的汽車類可編程 3-PLL VCXO 時鐘合成器 立即購買

    技術(shù)資料

    標題類型大?。↘B)下載
    Crystal or Crystal Oscillator Replacement with Silicon DevicesPDF894 點擊下載
    VCXO Application Guideline for CDCE(L)9xx FamilyPDF107 點擊下載
    General I2C / EEPROM usage for the CDCE(L)9xx familyPDF40 點擊下載
    Troubleshooting I2CPDF184 點擊下載
    Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913PDF297 點擊下載
    Generating Low Phase-Noise Clocks for Audio Data Converters from Low FrequencyPDF860 點擊下載

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