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    首頁產(chǎn)品索引MC10H640

    MC10H640

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    ?ECL/TTL Clock Driver

    制造商：ON

    中文數(shù)據(jù)手冊

    產(chǎn)品信息

    The MC10H/100H640 generates the necessary clocks for the 68030, 68040 and similar microprocessors. It is guaranteed to meet the clock specifications required by the 68030 and 68040 in terms of part-to-part skew, within-part skew and also duty cycle skew.
    The user has a choice of using either TTL or PECL (ECL referenced to +5.0V) for the input clock. TTL clocks are typically used in present MPU systems. However, as clock speeds increase to 50MHz and beyond, the inherent superiority of ECL (particularly differential ECL) as a means of clock signal distribution becomes increasingly evident. The H640 also uses differential PECL internally to achieve its superior skew characteristic.
    The H640 includes divide-by-two and divide-by-four stages, both to achieve the necessary duty cycle skew and to generate MPU clocks as required. A typical 50MHz processor application would use an input clock running at 100MHz, thus obtaining output clocks at 50MHz and 25MHz (see Logic Symbol).
    The 10H version is compatible with MECL 10H ECL logic levels, while the 100H version is compatible with 100K levels (referenced to +5.0V).
    • Generates Clocks for 68030/040
    • Meets 030/040 Skew Requirements
    • TTL or PECL Input Clock
    • Extra TTL and PECL Power/Ground Pins
    • Asynchronous Reset
    • Single +5.0V Supply Function Reset (R): LOW on RESET forces all Q outputs LOW and all Q outputs HIGH. Power-Up: The device is designed to have the POS edges of the b8;2 andSelect (SEL): LOW selects the ECL input source (DE/DE). HIGH selects the TTL input
    • Pb-Free Packages are Available

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    型號制造商描述購買
    MC10H640FNGONIC CLOCK DRIVER ECL-TTL 28-PLCC 立即購買

    技術(shù)資料

    標題類型大?。↘B）下載
    AC Characteristics of ECL DevicesPDF896 點擊下載
    ECL Clock Distribution TechniquesPDF54 點擊下載
    Interfacing Between LVDS and ECLPDF121 點擊下載
    Designing with PECL (ECL at +5.0 V)PDF102 點擊下載
    The ECL Translator GuidePDF142 點擊下載
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 點擊下載
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 點擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點擊下載

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