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    首頁產(chǎn)品索引MC10EP56

    MC10EP56

    購買收藏
    1 Differential, Dual ECL, 3.3 V / 5.0 V

    制造商：ON

    中文數(shù)據(jù)手冊

    產(chǎn)品信息

    The MC10/100EP56 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple V
    pins are provided.
    The V
    pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V
    as a switching reference voltage. V
    may also rebias AC coupled inputs. When used, decouple V
    and V
    via a 0.01uF capacitor and limit current sourcing or sinking to 0.5mA. When not used, V
    should be left open.
    The device features both individual and common select inputs to address both data path and random logic applications.
    The 100 Series contains temperature compensation.
    • 360ps Typical Propagation Delays
    • Maximum Frequency > 3 GHz Typical
    • PECL Mode Operating Range: V
    • = 3.0 V to 5.5 V with V
    • = 0 V
    • NECL Mode Operating Range: V
    • = 0 V with V
    • = -3.0 V to -5.5 V
    • Open Input Default State
    • Safety Clamp on Inputs
    • Separate and Common Select
    • Q Output will default LOW with inputs open or at V
    • V
    • Outputs
    • Pb-Free Packages are Available

    電路圖、引腳圖和封裝圖

    在線購買

    型號制造商描述購買
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    MC10EP56DTGONIC DIFF DIG MULTPL 2X2:1 20TSSOP 立即購買

    技術(shù)資料

    標題類型大?。↘B）下載
    AC Characteristics of ECL DevicesPDF896 點擊下載
    ECL Clock Distribution TechniquesPDF54 點擊下載
    Interfacing Between LVDS and ECLPDF121 點擊下載
    Designing with PECL (ECL at +5.0 V)PDF102 點擊下載
    The ECL Translator GuidePDF142 點擊下載
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 點擊下載
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 點擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點擊下載

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