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    首頁(yè)產(chǎn)品索引MC10EL32

    MC10EL32

    購(gòu)買收藏
    ?5.0 V ECL ÷·2 Divider

    制造商：ON

    中文數(shù)據(jù)手冊(cè)

    產(chǎn)品信息

    The MC10EL/100EL32 is an integrateddivide by 2 divider. The differential clock inputs and the V
    allow a differential, single-ended or AC coupled interface to the device. If used, the V
    output should be bypassed to ground with a 0.01 F capacitor. Also note that the V
    is designed to be used as an input bias on the EL32 only, the V
    output has limited current sink and source capability.
    The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the reset allows for the synchronization of multiple EL32's in a system.
    The 100 Series contains temperature compensation.
    • 510ps Propagation Delay
    • 3.0GHz Toggle Frequency
    • ESD Protection: > 1 KV HBM, > 100 V MM
    • PECL Mode Operating Range: V
    • = 4.2 V to 5.7 V with V
    • = 0 V
    • NECL Mode Operating Range: V
    • = 0 V with V
    • = -4.2 V to -5.7 V
    • Internal Input Pulldown Resistors on CLK(s) and R.
    • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
    • Moisture Sensitivity Level 1
    • For Additional Information, see Application Note AND8003/D
    • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
    • Transistor Count = 82 devices

    在線購(gòu)買

    型號(hào)制造商描述購(gòu)買
    MC10EL32DGON 立即購(gòu)買
    MC10EL32DTR2GONIC DIVIDER DIV X2 5V ECL 8-TSSOP 立即購(gòu)買
    MC10EL32DR2GONMC10EL/100EL32 是一款集成式 ÷2 分頻器。差分時(shí)鐘輸入和 VBB 允許差分、單端或 AC 耦合接口該器件。如果使用 VBB 輸出，應(yīng)通過(guò) 0.01 F 電容器將其旁路接地。還請(qǐng)注意，VBB 僅適合用作 EL32 上的輸入偏置，VBB 輸出具有有限的電流源汲能力。重置引腳是異步的，在上升邊進(jìn)行斷言。通電時(shí)，內(nèi)部觸發(fā)器將達(dá)到隨機(jī)狀態(tài)；重置可對(duì)系統(tǒng)中的多個(gè) EL32 進(jìn)行同步。100 系列包含溫度補(bǔ)償。 立即購(gòu)買

    技術(shù)資料

    標(biāo)題類型大?。↘B）下載
    AC Characteristics of ECL DevicesPDF896 點(diǎn)擊下載
    ECL Clock Distribution TechniquesPDF54 點(diǎn)擊下載
    Interfacing Between LVDS and ECLPDF121 點(diǎn)擊下載
    Designing with PECL (ECL at +5.0 V)PDF102 點(diǎn)擊下載
    The ECL Translator GuidePDF142 點(diǎn)擊下載
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 點(diǎn)擊下載
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 點(diǎn)擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載

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