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    首頁(yè)產(chǎn)品索引MC100EP16F

    MC100EP16F

    購(gòu)買收藏
    ?Differential Driver / Receiver With Reduced Output Swing

    制造商:ON

    中文數(shù)據(jù)手冊(cè)

    產(chǎn)品信息

    The MC100EP16F is a differential receiver/driver. The device is functionally equivalent to the EP16 device with higher performance capabilities. With reduced output swings, rise/fall transition times are significantly faster than on the EP16. The EP16F is ideally suited for interfacing with high frequency sources.
    The V
    pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V
    as a switching reference voltage. V
    may also rebias AC coupled inputs. When used, decouple V
    and V
    via a 0.01 uF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V
    should be left open.
    • 100 ps Typical Rise and Fall Time
    • Max Frequency >4 GHz
    • PECL Mode Operating Range: V
    • = 3.0 V to 5.5 V with V
    • = 0 V
    • NECL Mode Operating Range: V
    • = 0V with V
    • = -3.0 V to -5.5 V
    • Open Input Default State
    • Safety Clamp on Inputs

    電路圖、引腳圖和封裝圖

    在線購(gòu)買

    型號(hào)制造商描述購(gòu)買
    MC100EP16FDGONDifferential Receiver/Driver IC 8-SOIC 立即購(gòu)買
    MC100EP16FDTGONDifferential Receiver/Driver IC 8-TSSOP 立即購(gòu)買

    技術(shù)資料

    標(biāo)題類型大小(KB)下載
    AC Characteristics of ECL DevicesPDF896 點(diǎn)擊下載
    ECL Clock Distribution TechniquesPDF54 點(diǎn)擊下載
    Interfacing Between LVDS and ECLPDF121 點(diǎn)擊下載
    Designing with PECL (ECL at +5.0 V)PDF102 點(diǎn)擊下載
    The ECL Translator GuidePDF142 點(diǎn)擊下載
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 點(diǎn)擊下載
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 點(diǎn)擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載

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