
The LAN9218(i) is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9218(i) has been specifically architected to provide the highest performance possible for any given architecture. The LAN9218(i) is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX.
The LAN9218(i) includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit and 32-bit microprocessors and microcontrollers. The LAN9218(i) includes large transmit and receive data FIFOs with a high-speed host bus interface to accommodate high bandwidth, high latency applications. In addition, the LAN9218(i) memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity.
The? EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48? MAC Address. This Ethernet controller will automatically detect and load the EUI-48? node address from the? EEPROM at start-up or reset.?Highlights
Optimized for the highest performance applications
Efficient architecture with low CPU overhead
Easily interfaces to most 32-bit and 16-bit embedded CPU’s
Integrated PHY with HP Auto-MDIX Support
Supports audio & video streaming over Ethernet: multiple high-definition (HD) MPEG2 streams
Compatible with other members of LAN9218 family
Target Applications
Video distribution systems, multi-room PVR
Cable, satellite, and IP set-top boxes
Digital video recorders and DVD recorder/players
Digital TV
Digital media clients/servers and home gateways
Video-over IP Solutions, IP PBX & video phones
Wireless routers & access points
High-end audio distribution systems
Key Benefits
Non-PCI Ethernet controller for the highest performance applications
Highest performing non-PCI Ethernet controller
32-bit interface with fast bus cycle times
Burst-mode read support
Eliminates dropped packets
Internal buffer memory can store over 200 packets
Automatic PAUSE and back-pressure flow control
Minimizes CPU overhead
Supports Slave-DMA
Interrupt Pin with Programmable Hold-off timer
Reduces system cost and increases design flexibility
SRAM-like interface easily interfaces to most Embedded CPU's or SoC's
Reduced-Power Modes
Numerous power management modes
Wake on LAN*
Magic packet wakeup*
Wakeup indicator event signal
Link Status Change
Single chip Ethernet controller
Fully compliant with IEEE 802.3/802.3u standards
Integrated Ethernet MAC and PHY
10BASE-T and 100BASE-TX support
Full- and Half-duplex support
Full-duplex flow control
Backpressure for half-duplex flow control
Preamble generation and removal
Automatic 32-bit CRC generation and checking
Automatic payload padding and pad removal
Loop-back modes
Flexible address filtering modes
One 48-bit perfect address
64 hash-filtered multicast addresses
Pass all multicast
Promiscuous mode
Inverse filtering
Pass all incoming with status report
Disable reception of broadcast packets
Integrated 10/100 Ethernet PHY
Supports HP Auto-MDIX
Auto-negotiation
Supports energy-detect power down
Host bus interface
Simple, SRAM-like interface
32 or 16-bit data bus
16Kbyte FIFO with flexible TX/RX allocation
One configurable host interrupt
Miscellaneous features
Low-profile 100-pin TQFP, RoHS Compliant package
Integrated 1.8V regulator
General Purpose Timer
Optional EEPROM interface
Support for 3 status LEDs multiplexed with Programmable GPIO signals
Single 3.3V Power Supply with 5V tolerant I/O
Commercial and Industrial (LAN9218i)?Temperature Support
*Third-party brands and names are the property of their respective owners.
LAN9218 封裝圖
LAN9218 封裝圖
型號 | 制造商 | 描述 | 購買 |
---|---|---|---|
LAN9218I-MT | ON | IMAGE SENSOR CCD 4.1MP 67CPGA | 立即購買 |
LAN9218-MT | ON | IMAGE SENSOR CCD 1MP 67CPGA | 立即購買 |
標(biāo)題 | 類型 | 大小(KB) | 下載 |
---|---|---|---|
T-Engine/SH7727 LAN9218 TCP/IP協(xié)議棧 | 1136.64 | 點擊下載 | |
MAX9217/MAX9218 視頻鏈路中的音頻數(shù)據(jù)傳輸 | RAR | 444 | 點擊下載 |
RT9218 pdf datasheet (5V/12V S | RAR | 333 | 點擊下載 |
MAX9217/MAX9218視頻鏈路中的音頻數(shù)據(jù)傳輸 | RAR | 144 | 點擊下載 |
AD9218 pdf datasheet (10-Bit, | RAR | 444 | 點擊下載 |
RT9218B pdf datasheet (12V Syn | RAR | 333 | 點擊下載 |
北京2107A LA7680 KD9218 KD9217 LA7837彩電電路圖 | RAR | 336 | 點擊下載 |
MAX9217/MAX9218中文資料 | RAR | 322 | 點擊下載 |
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摘要:MAX9217/MAX9218串行器和解串器芯片組通過一對兒雙絞線LVDS鏈路實現(xiàn)視頻數(shù)據(jù)傳輸,廣泛用于汽車和工業(yè)應(yīng)用領(lǐng)域。視頻信號的每一幀總是存在消隱周期,可以利用這些周期“承
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