優(yōu)勢(shì)和特點(diǎn)

  Throughput: 2 MSPS maximum

  INL: ±0.4 LSB maximum

  Guaranteed 16-bit no missing codes

  Low power

  9.5 mW at 2 MSPS (VDD only)

  80 μW at 10 kSPS

  16 mW at 2 MSPS (total)

  SNR

  96.2 dB typical at 1 kHz

  95.5 dB typical at 100 kHz

  THD

  ?123 dB typical at 1 kHz

  ?99 dB typical at 100 kHz

  Ease of use features reduce system power and complexity

  Input overvoltage clamp circuit

  Reduced nonlinear input charge kickback

  High-Z mode

  Long acquisition phase

  Input span compression

  Fast conversion time allows low SPI clock rates

  SPI-programmable modes, read/write capability, status word

  Differential analog input range: ±VREF

  0 V to VREF with VREF between 2.4 V to 5.1 V

  Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface

  SAR architecture: no latency/pipeline delay

  Guaranteed operation: ?40°C to 125°C

  Serial interface SPI-/QSPI-/MICROWIRE-/DSP-compatible

  Ability to daisy-chain multiple ADCs and busy indicator

  10-lead, 3 mm × 3 mm LFCSP and 10-lead, 3 mm × 4.90 mm MSOP

產(chǎn)品詳情

The AD4001 is a low noise, low power, high speed, 16-bit, 2 MSPS, precision successive approximation register (SAR) analog-to-digital converter (ADC). It incorporates ease of use features thatlower the signal chain power, reduce signal chain complexity, andenable higher channel density. The high-Z mode, coupled with along acquisition phase, eliminates the need for a dedicated highpower, high speed ADC driver, thus broadening the range of lowpower precision amplifiers that can drive this ADC directly, whilestill achieving optimum performance. The input span compressionfeature enables the ADC driver amplifier and the ADC to operateoff common supply rails without the need for a negative supply while preserving the full ADC code range. The low serialperipheral interface (SPI) clock rate requirement reduces the digital input/output power consumption, broadens processoroptions, and simplifies the task of sending data across digitalisolation.

Operating from a 1.8 V supply, the AD4001 has a ±VREF fullydifferential input range with VREF ranging from 2.4 V to 5.1 V. The AD4001 consumes only 16 mW at 2 MSPS with a minimumSCK rate of 70 MHz in turbo mode and achieves ±0.4 LSBintegral nonlinearity error (INL) maximum, guaranteed no missing codes at 16 bits with 96.2 dB typical signal-to-noise ratio(SNR). The reference voltage is applied externally and can be setindependently of the supply voltage.

The SPI-compatible, versatile serial interface features sevendifferent modes including the ability, using the SDI input, to daisy-chain several ADCs on a single 3-wire bus and provides an optional busy indicator. The AD4001 is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic, using the separate VIO supply.

The AD4001 is available in a 10-lead MSOP or a 10-lead LFCSPwith operation specified from ?40°C to +125°C. The device is pin compatible with the AD4003 18-bit, 2 MSPS, precision SARdifferential ADC.

Applications

  Automatic test equipment

  Machine automation

  Medical equipment

  Battery-powered equipment

  Precision data acquisition systems