
dsPIC33EPXXGS50X is a?SMPS & Digital Power Conversion Digital Signal Controller. These devices offer features supporting common, multi-loop digital switch-mode power supplies (SMPS) and other digital power-conversion applications such as:
? AC to DC Converters
? DC to DC Converters
? Power Factor Correction (PFC)
? Uninterruptible power supply (UPS)
? Inverters
? Embedded Power-Supply Controllers
? Arc Fault Detection
3.0V to 3.6V, -40°C to +85°C, DC to 70 MIPS ? ? ??
3.0V to 3.6V, -40°C to +125°C, DC to 60 MIPS
Flash Architecture64K Flash Program Memory
Core: 16-Bit dsPIC33E CPU ??Two 40-Bit Wide Accumulators
Code-Efficient (C and Assembly) Architecture ? ? ? ? ? ? ? ? ? ? ? ? ?
Single-Cycle (MAC/MPY) with Dual Data Fetch ? ? ? ? ??
Single-Cycle Mixed-Sign MUL Plus Hardware Divide ? ? ? ? ?
32-Bit Multiply Support ? ? ? ? ?
Two Additional Working Register Sets (reduces context switching)
High-Speed PWM ? ? ? ? ? ? ? ? ?Individual Time Base and Duty Cycle for each PWM ? ? ? ? ??
1.04 ns PWM Resolution (frequency, duty cycle, dead time and phase) ? ? ? ? ??
Supports Center-Aligned, Redundant, Complementary and True Independent Output modes ? ? ? ??
Independent Fault and Current-Limit Inputs ? ? ? ??
Output Override Control ? ? ? ? ??
PWM Support for AC/DC, DC/DC, Inverters, PFC?and Lighting
Advanced Analog Features ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?High-Speed ADC module
12-bit with 4 dedicated SAR ADC cores and one shared SAR ADC core
Configurable resolution (up to 12-bit) for each ADC core
Up to 3.25 Msps conversion rate per channel at 12-bit resolution
Dedicated result buffer for each analog channel
Flexible and independent ADC trigger sources
Two digital comparators
Two oversampling filters for increased resolution ??
ADC with Early Interrupt feature. ? ?
Four Rail-to-Rail Comparators with Hysteresis:Dedicated 12-bit Digital-to-Analog Converter (DAC) for each analog?comparator
DAC reference outputs
External reference inputs ? ? ? ? ??
Two Programmable Gain Amplifiers: ?Single-ended or independent ground reference
Five selectable gains (4x, 8x, 16x, 32x and 64x)
40 MHz gain bandwidth
Interconnected SMPS PeripheralsReduces CPU Interaction to Improve Performance
Flexible PWM Trigger Options for ADC Conversions
High-Speed Comparator Truncates PWM (15 ns typical):?Supports Cycle-by-Cycle Current mode control
?Current Reset mode (variable frequency)
Timers/Output Compare/Input Capture16-Bit and up to Two 32-Bit Timers/Counters
Output Compare (OC) modules, Configurable as Timers/Counters
Input Capture (IC) modules
DSPIC33EP64GS504 封裝圖
DSPIC33EP64GS504 封裝圖
型號 | 制造商 | 描述 | 購買 |
---|---|---|---|
DSPIC33EP64GS504-I/PT | HCTL | 排針 P=2.00mm 20Pin(2x10)黃銅 彎插 | 立即購買 |
DSPIC33EP64GS504-I/ML | HCTL | 排針 P=2.00mm 18Pin(2x9)黃銅 彎插 | 立即購買 |
DSPIC33EP64GS504-E/PT | HCTL | 排針 P=2.00mm 16Pin(2x8)黃銅 彎插 | 立即購買 |
DSPIC33EP64GS504-E/ML | HCTL | 排針 P=2.00mm 14Pin(2x7)黃銅 彎插 | 立即購買 |
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