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    首頁(yè)產(chǎn)品索引NCP51510

    NCP51510

    購(gòu)買(mǎi)收藏
    ?±3A Sink/Source DDR Termination Regulator

    制造商:ON

    中文數(shù)據(jù)手冊(cè)

    產(chǎn)品信息

    NCP51510 is a source/sink Double Data Rate (DDR) termination regulator specifically designed for low input voltage and low-noise systems where space is a key consideration. The NCP51510 maintains a fast transient response anda only requires a minimum VTT load capacitance of 10uF for output stability. The NCP51510 supports remote sensing and all power requirements for DDR VTT bus termination. The NCP51510 can also be used in low-power chipsets and graphics processor cores that require dynamically adjustable output voltages. The NCP51510 is available in the thermally-efficient DFN10 Exposed Pad Package, and is rated both Green and Pb-Free.
    • Supports Loads Up to 3 A (Typ), Output is Overcurrent Protected
    • DDRI, DDRII, DDRIII Source / Sink Currents
    • Integrated MOSFETs with Thermal Shutdown Protection
    • PGOOD Output Pin to Monitor Status of VTT Output Regulation
    • SS Input Pin for Suspend Shutdown mode
    • VRI Input Reference for Flexible Voltage Tracking
    • VTTS Input for Remote Sensing (Kelvin Connection)
    • Builtin Soft Start, Under Voltage Lockout

    在線(xiàn)購(gòu)買(mǎi)

    型號(hào)制造商描述購(gòu)買(mǎi)
    NCV51510MNTAGON 立即購(gòu)買(mǎi)
    NCP51510MNTAGON 立即購(gòu)買(mǎi)
    NCV51510MWTAGON 立即購(gòu)買(mǎi)

    技術(shù)資料

    標(biāo)題類(lèi)型大?。↘B)下載
    3 Amp VTT Termination Source / Sink Regulator for DDR, DDR-2, DDR-3 & DDR-4PDF142 點(diǎn)擊下載
    DFN10, 3x3, 0.5PPDF32 點(diǎn)擊下載
    AEI"s VLR Gain ModelUNKNOW818 點(diǎn)擊下載

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