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    首頁產(chǎn)品索引NBSG72A

    NBSG72A

    購買收藏
    ?2 x 2 Crosspoint Switch, SiGe Differential, 2.5 V / 3.3 V, with Ouput Level Select

    制造商:ON

    中文數(shù)據(jù)手冊

    產(chǎn)品信息

    The NBSG72A is a high-bandwidth fully differential 2 X 2 crosspoint switch with Output Level Select (OLS) capabilities. This is a part of the GigaComm family of high performance Silicon Germanium products. The device is housed in a low profile 3 X 3 mm 16-pin QFN package.
    Differential inputs incorporate internal 50 Ω termination resistors and accept NECL (Negative ECL), PECL (Positive ECL), LVCMOS/LVTTL, CML, or LVDS. The OLS input is used to program the peak-to-peak output amplitude between 0 and 800 mV in five discrete steps. The SELECT inputs are single-ended and can be driven with either LVECL or LVCMOS/LVTTL input levels.
    • Maximum Input Clock Frequency > 7 GHz Typical
    • Maximum Input Data Rate > 7 Gb/s Typical
    • 200 ps Typical Propagation Delay (OLS = FLOAT)
    • 55/45 ps Typical Rise/Fall Times (OLS = FLOAT)
    • Selectable Swing PECL Output with Operating Range: V
    • = 2.375 V to 3.465 V with V
    • = 0 V
    • Selectable Swing NECL Output with NECL Inputs with Operating Range: V
    • = 0 V with V
    • = ?2.375 V to ?3.465 V
    • Selectable Output Levels (0 mV, 200 mV, 400 mV, 600 mV or 800 mV Peak-to-Peak Output)
    • 50 Ω Internal Input Termination Resistors
    • Single?ended LVECL or LVCMOS/LVTTL Select Inputs (SELA, SELB)
    • Failure management system to automatically re-route data

    電路圖、引腳圖和封裝圖

    在線購買

    型號制造商描述購買
    NBSG72AMNR2GONCROSS POINT SWITCH, 2 CHANNEL 立即購買
    NBSG72AMNGONIC CROSSPOINT SW 1 X 2:2 16QFN 立即購買

    技術(shù)資料

    標(biāo)題類型大?。↘B)下載
    AC Characteristics of ECL DevicesPDF896 點(diǎn)擊下載
    ECL Clock Distribution TechniquesPDF54 點(diǎn)擊下載
    Designing with PECL (ECL at +5.0 V)PDF102 點(diǎn)擊下載
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 點(diǎn)擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載
    Interfacing with ECLinPSPDF72 點(diǎn)擊下載
    Termination of ECL Logic DevicesPDF176 點(diǎn)擊下載
    Thermal Analysis and Reliability of WIRE BONDED ECLPDF119 點(diǎn)擊下載

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