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    首頁產(chǎn)品索引NB3N1200K

    NB3N1200K

    購買收藏
    12 HCSL Clock ZDB/Fanout Buffer for PCle

    制造商：ON

    中文數(shù)據(jù)手冊

    產(chǎn)品信息

    The NB3N1200K and NB3W1200L differential clock buffers areDB1200Z and DB1200ZL compliant and are designed to work inconjunction with a PCIe compliant source clock synthesizer to providepoint?to?point clocks to multiple agents. The device is capable ofdistributing the reference clocks for Intel? QuickPath Interconnect(Intel QPI & UPI), PCIe Gen1/Gen2/Gen3/Gen4, SAS, SATA, and Intel ScalableMemory Interconnect (Intel SMI) applications. The VCO of thedevice is optimized to support 100 MHz and 133 MHz frequencyoperation. The NB3N1200K and NB3W1200L utilizepseudo?external feedback topology to achieve low input?to outputdelay variation. The NB3N1200K is configured with the HCSL buffertype, while the NB3W1200L is configured with the low?power NMOS Push?Pull buffer type.
    • 12 Differential Clock Output Pairs @ 0.7 V
    • HCSL Compatible Outputs for NB3N1200K
    • Optimized 100 MHz and 133 MHz Operating Frequencies to Meet The Next Generation PCIe Gen 2/Gen 3/Gen4 and Intel QPI & UPI Phase Jitter
    • DB1200Z Compliant
    • 3.3 V ±5% Supply Voltage Operation
    • Fixed?Feedback for Lowest Input?To?Output Delay Variation
    • SMBus Programmable Configurations to Allow Multiple Buffers in a
    • Single Control Network
    • PLL Bypass Configurable for PLL or Fanout Operation
    • Programmable PLL Bandwidth
    • 2 Tri?level Addresses Selection (9 SMBUS Addresses)
    • Individual OE Control Pin for Each of 12 Outputs
    • 50 ps Max Output?to?Output Skew Performance
    • 50 ps Max Cycle?to?Cycle Jitter (PLL mode)
    • 100 ps Input to Output Delay Variation Performance
    • QFN 64?pin Package, 9 mm x 9 mm
    • Spread Spectrum Compatible: Tracks Input Clock Spreading for LowEMI
    • 0°C to +70°C Ambient Operating Temperature

    在線購買

    型號制造商描述購買
    NB3N1200KMNGON 立即購買
    NB3N1200KMNTXGONNB3N1200K 和 NB3W1200L 差分時鐘緩沖器符合 DB1200Z 和 DB1200ZL，適用于結(jié)合符合 PCIe 標(biāo)準(zhǔn)的源時鐘合成器來為多個代理提供點對點時鐘。該器件能夠為 Intel 快速通道互聯(lián) (Intel QPI & UPI)、PCIe Gen1/Gen2/Gen3/Gen4、SAS、SATA 和 Intel 可擴(kuò)充內(nèi)存互連 (Intel SMI) 應(yīng)用分發(fā)參考時鐘。該器件的 VCO 針對 100 MHz 和 133 MHz 頻率運(yùn)行進(jìn)行優(yōu)化。NB3N1200K 和 NB3W1200L 使用假外部反饋拓?fù)浣Y(jié)構(gòu)來實現(xiàn)低輸入-輸出延遲變化。NB3N1200K 配置了 HCSL 型緩沖器，NB3W1200L 配置了低功耗 NMOS 推拉型緩沖器。 立即購買

    技術(shù)資料

    標(biāo)題類型大?。↘B）下載
    3.3 V 100/133 MHz Differential 1:12 HCSL Clock Fanout Buffer for PCIePDF175 點擊下載
    QFN64 9x9, 0.5P (PUNCH & SAWN)PDF60 點擊下載
    NB3N1200K IBIS ModelUNKNOW70 點擊下載
    A System Designer"s Guide for Building a PCIe Clock Tree while Addressing Timing ChallengesPDF179 點擊下載
    NB3N1200K/NB3W1200L Evaluation Board User"s ManualPDF792 點擊下載

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