Low-power, low-voltage 700/800/900MHz transceiver designed for low-cost IEEE 802.15.4-2011, ZigBee Pro, 6LoWPAN, and high data rate ISM applications available in China, Europe, North America, and Japan. The transceiver offers an extreme 120 dB link budget (-110 dBm receiver sensitivity / +10 dBm transmit power). It is a true SPI-to-antenna solution providing a complete radio transceiver interface between the antenna and the microcontroller. MAC and AES hardware accelerators improve overall system power efficiency and timing.

It comprises the analog radio transceiver and the digital demodulation including time and frequency synchronization, and data buffering. All RF-critical components are integrated on a single chip minimizing the number of required external components to the antenna, crystal and decoupling capacitors. The bidirectional differential antenna pins, used for transmission and reception, eliminate the need for an external antenna switch.

An internal 128 byte RAM buffers transmit and receive data. Two on chip low dropout (LDO) voltage regulators provide the internal analog and digital 1.8V supply.

  Fully integrated 769-935MHz transceiver including:

  Chinese WPAN band from 779 to 787MHz

  European SRD band from 863 to 870MHz

  North American ISM band from 902 to 928MHz

  Japanese band from 915 to 930MHz

  Direct Sequence Spread Spectrum with different modulation and data rates:

  BPSK with 20 and 40kb/s, compliant to IEEE? 802.15.4-2003/2006/2011

  O-QPSK with 100 and 250kb/s, compliant to IEEE 802.15.4-2006/2011

  O-QPSK with 250kb/s, compliant to IEEE 802.15.4-2011

  O-QPSK with 200, 400, 500, and 1000kb/s PSDU data rate

  Flexible combination of frequency bands and data rates

  Industry leading link budget:

  Receiver sensitivity up to -110dBm

  Programmable TX output power up to +11dBm

  Ultra-low current consumption:

  SLEEP = 0.2μA

  TRX_OFF = 450μA

  RX_ON = 9.2mA

  BUSY_TX = 18.0mA at TX output power +5dBm

  Ultra-low supply voltage (1.8V to 3.6V) with internal regulator

  Easy to use interface:

  Registers, frame buffer, and AES accessible through fast SPI

  Clock output with prescaler from radio transceiver

  Radio transceiver features:

  128-byte FIFO (SRAM) for data buffering

  Fully integrated, fast settling PLL to support Frequency Hopping

  Battery monitor

  Adjustable receiver sensitivity

  Integrated TX/RX switch, LNA, and PLL loop filter

  Automatic VCO and filter calibration

  Integrated 16MHz crystal oscillator

  Special IEEE 802.15.4?-2011 hardware support:

  FCS computation and Clear Channel Assessment

  RSSI measurement, Energy Detection and Link Quality Indication

  MAC hardware accelerator:

  Automated acknowledgement and retransmission

  CSMA-CA and Listen Before Talk (LBT)

  Automatic address filtering and automated FCS check

  Extended feature set hardware support:

  AES 128-bit hardware accelerator

  Antenna Diversity

  RX/TX indication for external RF front end control

  True Random Number Generation for security application

  Optimized for low BoM Cost and ease of production:

  Few external components necessary (crystal, capacitors and antenna)

  Excellent ESD robustness

  Industrial temperature range from -40°C to +85°C

  I/O and packages:

  32-pin Low-Profile QFN Package 5 x 5 x 0.9mm3

  RoHS/Fully Green

  Compliant to IEEE 802.15.4-2003/2006/2011

  Compliant to ETSI EN 300 220-1, and FCC 47 CFR Section 15.247